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  specifications: vsc8142  r ates: oc-48/12/3, fec, gbe, fibre channel and other various data rates  power dissipation: 700mw  selectable reference clock frequency (78mhz or 155mhz)  supply voltage: 2.5v or optional 2.5v/3.3v  23mm x 23mm, 208 bga package  16-bit lvpecl parallel interface  o perating temperature ranges: -40 c to +85 c ambient, 0 c to 70 c ambient VSC8145  ra tes: oc-48/-12/-3, fec, gbe, fibre channel and other various data rates  power dissipation: 800mw  selectable reference clock frequency (155mhz or 622mhz)  supply voltage: 2.5v  21mm x 21mm, 156 bga package  4-bit lvds parallel interface  o perating temperature ranges: -40 c to +85 c ambient, 0 c to 70 c ambient vsc8147  rates: oc-48, fec  power dissipation: 800mw  supply voltage: 2.5v  14mm x 14mm, 100-pin pqfp package  4-bit lvds parallel interface  o perating temperature ranges: -40 c to +85 c ambient, 0 c to 70 c ambient features:  o c-48/-12/-3, fec, gbe, fibre channel and other various data rates  integrated clock recovery and clock multiplier units  wide ranging plls with bypass capabilities  low-speed bit order swap (msb/lsb)  on-board fifo with auto-reset function  high-speed clock output power-down option  los detect with auto-lock to reference clock  facility, equipment, and split loopback modes  0.18_ cmos technology applications:  sonet/sdh systems  dwdm systems  optical crossconnects  optical test equipment 2.5g multi-rate sonet/sdh transceiver family physical layer products pb-vsc8142,45,47-001 vsc8142, 8145, 8147
for more information on vitesse products, visit the vitesse web site at www.vitesse.com or contact vitesse sales at (800) vitesse or sales@vitesse.com ?2003 vitesse semiconductor corporation 2.5g multi-rate sonet/sdh transceiver family vsc8142, 8145, 8147 the vsc8142, VSC8145 and vsc8147 are extended multi-rate transceivers with integrated clock recovery unit (cru) and clock multiplier unit (cmu) for use in sonet/sdh, dwdm, and other optical transport systems. the devices perform all required serialization and deserialization functions for oc-48, oc- 12, oc-3, fec, gigabit ethernet, fibre channel and fddi/fast ethernet data rates. the integrated cru phase locked loop (pll) recovers the high- speed clock from the input non-return to zero (nrz) data signal. the integrated cmu pll multiplies a low-speed reference clock to provide the high-speed serial line clock for internal logic and output retiming. both cru and cmu can be bypassed to accommodate rates not supported by the plls. the parallel interface incorporates an on-board fifo with auto-reset to eliminating interfacetiming issues. the devices support serial looptiming as well as facility, equipment, and split loopback modes. the vsc8142, VSC8145 and vsc8147 exceed the telecordia and itu-t standards for jitter generation, tolerance and transfer providing ample design margin. the typical 800mw power dissipation, along with the thermally-enhance packages, eliminates the need for external heatsinks and allow the devices to be used in diverse operating environments. all device are available in commercial and industrial temperature ranges. block diagram: general description: 741 calle plano camarillo, ca 93012, usa t el: +1 805.388.3700 fax: +1 805.987.5896 www.vitesse.com benefits:  full sonet/sdh jitter compliance: - low jitter generation: less than 5mui (typical) - high jitter tolerance: exceeds 2x the sonet mask  wide-ranging plls that not only provide support for the standard sonet/sdh rates, but also for: - fibre channel, 2xfibre channel - gigabit ethernet - fec - fddi - fast ethernet  i ntegrated cru and cmu can be bypassed if an external cdr is required, (e.g, the all-rate/adaptive vsc8123 cdr)  t he order of the msb and lsb on the low-speed interfaces can be reversed, giving the designer increased flexibility when laying out the board  o n-board fifo auto-reset function eliminates the need to use an external logic  l oss of signal detection on high-speed data inputs for robust line monitoring support  a utomatic lock to reference clock on los detection provides continuous clocking for upstream devices  in tegrated high-speed and low-speed test capabilities provide system diagnostic support rsdi refclk tsdo tsclko cru cmu rclk4 tdi(0:3) rdo(0:3) refclk tclk40 tclk41 fifo demux mux


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